Guide to the John L. Hennessy Personal Papers SC1362
Note
Subjects and Indexing Terms
Series 1. Publications Accession ARCH-2017-269
Computer Architecture a Quantitative Approach 1996
Maryland 1994 Mar
Flash Slides ARPA 1993 Nov
DASH (1 of 2)
DASH (2 of 2)
EE182: Computer Architecture and Organization Information Sheet 1993-1992
Computer Architecture a Quantitative Approach 1996
Tau Beta Pi Teaching Survey Winter Quarter 1978-1979
Tau Beta Pi Teaching Survey Spring Quarter 1978-1979
Tau Beta Pi Teaching Survey Autumn Quarter 1976-1977
Tau Beta Pi Engineering Course Evaluations Spring Quarter 1981
Tau Beta Pi Engineering Course Evaluations Autumn Quarter 1980
Tau Beta Pi Engineering Course Evaluations Winter Quarter 1981
Endowed Professorships Directorships at Stanford University 1992 Feb 10
Booklet of Abstracts and Viewgraphs Stanford Computer Forum 1984 Feb
DEC System -10/20 Hardware Manual 1977
CSL, Abstracts 1968-1992
A 160nS 54bit CMOS Division Implementation using Self-timing and symmetrically overlapped SRT stages
A 4 nsec 4Kxlbit Two-Port BiCMOS SRAM 1988
A 4-ns 4K x 1-bit Two-Port BiCMOS SRAM 1998
A 4ns 64KB BiCMOS SRAM Authors: Wingard, Stark, Horowitz
A 4-ns BiCMOS translation Lookaside Buffer Authors: Tamura, Yang, Wingard, Horowitz
Accuracy of Trace-Driven Simulationsof Multiprocessors (The) short version
Accuracy of Trace-Driven Simulationsof Multiprocessors (The) 1992
Accurate Analysis of Array References 1992 Sep
Hennessy, John Advances in Compiler Technology
Authors: Clyde Carpenter Mark Horowitz
Algorithms
Analysis of Cache Invalidation Patterns in Multiprocessors 1988
Analysis of Cache Performance for Operating Systems and Multiprogramming 1987 May
Analysis of Critical Architectural and Program Parameters in a Hierarchical Shared Memory Multiprocessor
"Analysisof Parallelism and Deadlocks in Distributed-Time Logic Simulation 1989
Analysis of Power Supply Networks in VSLI Circuits 1991 Mar
An Analytical Cache Model Authors: Anant Agarwal, Mark Horowitz, John Hennessy 1986
An Analytical Cache Model Version 1988 Apr 25
Analyzing CMOS Power Supply Networks Using Ariel 1988
Analyzing and Tuning Memory Performance in Sequential and … M. Martonosi 1994 Jan
Anonymous one-time signatures and flexible untraceable electronic cash 1988
Architectural and implementation tradeoffs in the design of multiple-context processors 1992
Architectural and implementation tradeoffs in the design of multiple-context… 1994 Sep
Architectural Tradeoffs in the design of MIPS 1985 Oct
"Architecture of Field Programmable Gate Arrays: The Effect of Logic Block Functionality on Area Efficiency
Array Data-Flow Analysis and its use in Array Privatization 1993
Asymptotic Waveform Evaluation for Circuits with redundant DC Equations 1991 May
ATUM: A New Technique for Capturing Address Traces Using Microcode
Automatic and Explicit Parallelization of N-Body Simulation 1991 Mar
BiNMOS: A Basic Cell for BiCMOS Sea-of-Gates
The Benefits of Cllustering in Shared Address Space Multiprocessors: An Applications-Driven Investigation
Bipolar Circuit elements providing self-completion-indication 1989
Russell Kao, Bob Alverson, Mark Horowitz, and Don Starck
Boosting Beyond Static Scheduling in a Superscalar Processor 1990 July
Cache Coherence Directories for Scalable Multiprocessors 1992 Oct
Cache Coherency Protocol Design Options for Large Scale Multiprocessors
Cache Invalidation Patterns in Shared-Memory Multiprocessors
Cache Performance of Operating System and Multiprogramming Workloads
The Cache Performance and Optimizations of Blocked Algorithms 1991
Characteristics of Performance-Optimal Multi-Level Cache Hierarchies
Characterization of Parallelism and Deadlocks in Distributed Digital Logic Simulation 1989 Jun
Characterizing the Cache Performance and Synchronization Behavior of a Multiprocessor Operating System 1992 Jan
Characterizing the Caching and Synchronization Performance of a Multiprocessor Operating System 1992
Characterizing the Synchronization Behavior of Parallel Programs 1988 July
Charging sharing models for MOS circuits 1986 Nov
Charge-sharing models for switch-level simulation
Circuit Techniques for Large CSEA SRAMs 1992
A Clocking Discipline for Two-Phase Digital Integrated Circuits 1983 Jan
Coarse-Grain Parallel Programming in Jade
Code Generation using Tree Matching and Dynamic Programming 1989 Oct
Code Optimization Across Procedures 1989 Feb
Code Optimization of Pipeline Constraints 1983 Dec
A Comparative Evaluation of Nodal and Supernodal Parallel Sparse Matrix Factorization: Detailed Simulation results 1992 May
Comparative Performance Evaluation of Cache-Coherent NUMA and COMA Architectures 1991 Nov 12
Comparative Performance Evaluation of Cache-Coherent NUMA and COMA Architectures 1992 May
Comparison of the Rete and Treat Production Matchers for Soar (A Summary) 1988
Comparative Evaluation of Latency Reducing and Tolerating Techniques 1991 Mar
"Competitive Management of Distributed Shared Memory" Authors: D. Black, A. Gupta, W-D Weber 1989
"Compilation of Single Assignment Languages: Analysis and Propositions" Authors: P. Schnorf . Ganapathi 1989 Nov
"Compile-Time Copy Elimination" Authors: P. Schnorf, M. Ganapathi, JLH 1993 Apr
Compile-time Partitioning Scheduling of Parallel Programs
Compiling Single Assignment Languages Authors: K. Gopinath and J.L. Hennessy
Uncorrected Preliminary Manuscript Computer Organization and Design: the Hardware/Software Interface 1997
Computer Technology and Architecture: An Evolving Interaction
Consumer-based versus Producer-based Prefetch 1994 Mar
"Cool: A Language for Parallel Programming" Authors: R. Chandra, A. Gupta, J. Hennessy 1989 Oct
Copy Elimination with Abstract Interpretation
Copy Elimination in Functional Languages 1988 Nov
The DASH prototype: implementation and performane 1992
The DASH prototype: Logic Overhead and Performance 1993
Data dependence and data-flow analysis of arrays 1992
Data Locality and Load Balancing in COOL 1993
Data Locality and Memory System Performance in the Parallel Simulation of Ocean Eddy Currents 1991 Aug
Data Locality Optimizing Algorithm 1991
Deriving Accurate Fault Models Author: John Michael Acken 1988 Oct
Design and Analysis of DASH: A scalable directory-based multiprocessor 1992 Feb
"Design and Clocking of VLSI multipliers" M. R. Santoro 1989 Oct
"Design of a Digital Audio Input Output Chip"
Design and Evaluation of Compiler Optimizations for Scalable Shared Address Space Machines 1994
Design and Evaluation of a Compiler Algorithm for Prefetching 1992
Design of a High-Performance Cache-Controller: a case study in asynchronous synthesis 1993 Apr
Design of a high-performance VLSI Processor 1983 Feb
Design and Implementation of an Optimizing Compiler for Single Assignment Language 1990 Nov
"Design of the Stanford DASH Multiprocessor" 1989 Dec
The Design and Testing of MIPS-X P.Chow and M. Horowitz
The Design Verification Testing of MIPS
"Designing High-Performance Digital Circuits Using Wave Pipelining Authors: Wong, DeMicheli, Flynn
Detecting Violations of Sequential Consistency Author: Gharachorloo, K. Gibbons, P. 1991 May
"The Directory-Based Cache Coherence Protocol for the DASH Multiprocessor" Authors: D. Lenoski, J. Laudon, et al 1989 Dec
Dynamic Pointer Allocation for Scalable Cache Coherence Directories Author: Simoni, R. /Horowitz, M. 1991 Aug
Editing Graphical Objects Using Procedural Representations Author: Paul Asente 1987 Oct
The Effect of Logic Block Complexity on Area of Programmable Gate Arrays Authors: Rose, Francis, Chow, Lewis
Effectiveness of Trace Sampling for Performance Debugging Tools Martonosi, M. Gupta, A, and Anderson T. 1993 July
Effective Copy Elimination in Single Assignment Languages Author: Schnorf, Peter et al. 1991
Efficient Block-Oriented Approach to Parallel Sparse Cholesky Factorization (An) 1992 July
Efficient and Exact Data Dependence Analysis 1991 Jun
"Efficient Generation of Test Patterns Using Boolean Satisfiability" (thesis) Author: T. Larrabee 1990 Feb
Efficient Moment-Based Timing Analysis for Variable Accuracy Switch Level Simulation 1991 Apr
Efficient Moment-Based Timing Analysis for Variable Accuracy Switch Level Simulation 1991 Apr
Efficient Scheduling on Multiprogrammed Shared-Memory… A. Tucker 1994 Jan
Efficient Sparse Matrix Factorization on High-Performance Workstations -- Exploiting the Memory Hierarchy 1990 Sep 12
Efficient Superscalar Performance Through Boosting Smith, Horowitz, Lam, M.
Eliminating Redundant DC Equations for Asymptotic Waveform Evaluation 1993 Apr 19
Emitter Follower-Based Drivers for Large ECL loads 1993 May 19-21
An Empirical Investigation of the Effectiveness and Limitations of Automatic Parallelization 1991 Apr
An Empirical Comparison of the Kendall Square Research KSR-1 and Stanford DASH Multiprocessors Authors: Singh, JP et al 1993 Nov 15-19
Equilibrium Detection and Temperature Measurement of Simulated Annealing Placements 1988 May
Torrellas and Hennessy
Evaluating Interprocedural Code Optimization Techniques 1991 Feb
Evaluating the Benefits of Cache-Affinity Scheduling in Shared-Memory Multiprocessors 1992 Aug
Evaluating the Memory Overhead Required for COMA Architectures 1994 Apr
An Evaluation of the Chandy-Misra-Byrant Algorithm for Digital Logic Simulation 1992 Jan
Evaluation of Directory Schemes for Cache Coherence 1988
Experiences Implementing a Parallel ATMS on a Shared-Memory Multiprocessor 1989
Eploiting the Memory Hierarchy in Sequential and Parallel Sparse Cholesky Factorization 1992 Nov
Exploiting Variable Grain Parallelism at Runtime 1988 July
Exploring the Benefits of Multiple Hardware Contexts in a Multiprocessor Architecture: Preliminary Results Authors: Weber, Gupta 1988 Nov 16
Fast Functional Simulation: An Incremental Approach 1988 July
Fast Operating System Simulation 1994 Oct
"Fast Sparse Matric Factorization on Modern Workstations" Authors: E. Rothberg, A. Gupta 1989 Oct 2
P. A. Eichenberger Thesis (original copy) 1986 Apr
Fast Symbolic Layout Transition for Custom VLSI Integrated Circuits 1986 Apr
FIAT: A Framework for Interprocedural Analysis and Transformation 1994
Finding and Exploiting Parallelism in an Ocean Ocean Simulation Program: Experience, Results, and Implications
Flexible Netlist Processing Via Pattern Matching 1993
The Formal Definition of a Real-Time Language 1978 July
General Compiled Electrical Simulation Authors: Weise, Seligman 1989
Generalization in Connectionist Network that Realize Boolean Functions Authors: K.A. Ruyser, M. A. Horowitz
Generating Incremental VLSI Compaction Spacing Constraints Clyde Carpenter Mark Horowitz 1987
Hardware C- A Language for Hardware Design , Authors: Ku. DeMicheli 1988
Hardware-Software Co-Design 1993 Oct
Hardware/Software Tradeoffs for Increased Performance Authors: J. Hennessy, N. Jouppi, et al. 1983 Jan
Hercules - A System for High-level synthesis 1988
The Hermod Behavioral Synthesis System Authors: Odani, Hwang, Blank, Rokicki 1989
Hiding Memory Latency using Dynamic Scheduling in Shared-Memory Multiprocessors 1992 May
Hiding Memory Latency using Dynamic Scheduling in Shared-Memory Multiprocessors 1993 Apr
High Performance Microprocessor Architectures 1989-1990
High Speed BiCMOS Memories 1994 Dec
Impact of Operating System scheduling policies and synchronization methods on the performance of parallel applications 1990 Sep 19
The Implementation of MIPS 1984 Aug
"Implementing a Directory-Based Cache Consistency Protocol" Author Richard Simoni 1990 Mar
Implications of Hierarchical N-body Techniques for Multiprocessor Architecture
Implications of Hierarchical N-body Techniques for Multiprocessor Architecture 1992 Jan
Implications of Non-Binary Sized Instructions 1992 May 19-21
Improved Models for Switch-level simulation Author: Chorng-Yeong Chu
Improving Locality and Parallelism in Nested Loops 1992 Aug
Incremental Circuit Extraction
Incremental -in-Time Algorithm for Digital Simulation
Efficiency Considerations in Program Synthesis: A Knowledge-Based Approach 1979 Sep
File Access Performance of Diskless Workstations 1984 Jun
Incremental Tools for the Design and Verification of VLSI Circuits 1993
Incremental VLSI Compaction Author: Clyde W. Carpenter 1988 Dec
Instruction Selection by Attributed Parsing 1984 Feb
Integrating Concurrency and Data Abstraction in the COOL Parallel Programming Language
Integrated Pin Electronics for VLSI Functional Testers
Integrating Concurrency and Data Abstraction in a Parallel Programming Language 1992
Integrating Concurrency and Data Abstraction in a Parallel Programming Language 1992 Feb
Integrating Scalar Optimization and Parallelization 1991 Aug
Integration of Message Passing and Shared Memory 1994 Oct
Interleaving: A Multithreading Technique Targetting Multiprocessors and Workstations 1994 Oct 5-7
Interprocedural Analysis Useless for Code Optimization 1987 Nov
Interprocedural Analysis vs. Procedure Integration 1989 Apr
Interprocedural Optimization: Experimental Results 1989
"Interval Methods for Distributed Simulation Systems" Authors: A.R.W. Todesco
"IRSIM: An Incremental MOS Switch-Level Simulator" 1988
John Hennessy A Language for Microcode Description and Simulation in VLSI 1980 July
Latency and Throughput Tradeoffs in Self-Timed Speed-Independent Pipelines Rings 1990 Aug
Limits of Control Flow on Parallelism 1992 May 19-21
Limits on Multiple Instruction Issue Authors: M. Smith, M. Johnson, M. Horowitz 1990 July
LISP 1986
LISP 1987 Mar
LISP on a Reduced-Instruction-Set Processor: Characterization and Optimization
Load Balancing and Data Locality in Hierarchical N-Body Methods 1992 Jan
LocusRoute: A Parallel Global Router for Standard Cells 1988
Logic Minimization, Placement Routing in SWAMI
Mable: A Technique for Efficient Machine Stimulation 1994 Oct
Mable: A Technique for Efficient Machine Stimulation 1994 Apr 18-21
MAGIC: the Beta Release UCB-EECS 1985 Aug
Making Effective Use of Shared-Memory Multiprocessors: The Process Control Approach 1991 July
Measurement, Analysis and Improvement of the Cache Behavior of a Shared Data in Cache Coherent Multiprocessors" 1990 Feb
Measurement and Evaluation of the MIPS Architecture and Processor
Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors 1993 Apr
"Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors" 1990 Mar
Memory-Reference Characteristics of Multiprocessor Applicationa under MACH 1988
MemSpy: Analyzing Memory System Bottlenecks in Programs 1992 Jun
"A Methodology for Modeling Inter-processor Traffic in Shared Memory Multiprocessors" 1989 July
MIPS: A Microprocessor Architecture 1982 Oct
MIPS: A VLSI Processor Architecture 1981 Sep
MIPS-X: A 20 MIPS Peak, 32-bit microprocessor with on-chip cache
The MIPS-X External Cache Processor: Functionality and I/O 1987
MIPS-X: The External Interface 1987 Nov
MIPS-X: Instruction Set and Programmer's Manual
The MIPSX Microprocessor Horowitz, Chow 1985
Modeling the Performance of Limited Pointers Directories for Cache Coherence 1991
MTOOL: an Integrated System for Performance Debugging Shared Memory Multiprocessor Applications 1992 May
MTOOL: A Method for Isolating Memory Bottlenecks in Shared Memory Multiprocessor Programs 1991 Aug 12-16
Multi-Level Logic Array Synthesis Author: Rowen, Christopher 1985 July
Multiprocessor Cache Memory Performance: Characterization and Optimization 1992 Aug
Multiprocessor Cache Analysis Using ATUM 1988 Jun
Multiprocessor RISCS: Design Issues R. H. Katz, et al.
MultiTitan-Four Architecture Papers Digital, West. Res. Lab. 1988
Multis: A New Class of Multiprocessor Computers By: Bell
The Livermore Fortran Kernels: A Computer Test of the Numerical Performance Range. Author: F. McMahon 1986 Dec
Multiprocessor Performance Debugging and Memory Bottlenecks 1992 Aug
Multiprocessor RISCS: Design Issues Initial Analyses
Multiprocessor Simulation: Achieving Accuracy, Efficiency, and Flexibility 1993 Oct
Multiprocessor Simulation and Tracing Using Tango 1991 Aug 12-16
"Nondeterminism and Unification in Log-Scheme: Integrating Logic and Functional Programming"
On-Chip Instruction Caches for High Performance Processors Anant Agarwal, Paul Chow, Mark Horowitz 1987
Organization and VLSI Implementation of MIPS 1984 Apr
An Overview of the MIPS-X-MP Project #86-300 John Hennessy Mark Horowitz 1986 Apr
Overview and Status of the Stanford DASH Multiprocessor 1991 Apr
Overview of the Stanford U-Code Compiler System
Overview of Work in VLSI Systems and Software Area
A Parallel Adaptive Fast Multipole Method 1993 Nov 15-19
The Parallel Decomposition and Implementation of an Integrated Circuit Global Router 1988 July
"Parallel Distributed-Time Logic Simulation" Authors: L. Soule, A. Gupta
Parallel Global Routing for Standard Cells Author: Rose
Parallel Hierarchical N-Body Methods and Their Implications for Multiprocessors 1993 Mar
Parallelizing Compilers: Implementation and Effectiveness 1993 Jun
Parallel ICCG on a Hierarchical Memory Multiprocessor-- Addressing the Triangular Solve Bottleneck
Parallel Implementation of OPS5 on the Encore Multiprocessor: Results Analysis Authors: Gupta, Tambe, Kalp, Forgy, Newell 1988
Parallel Logic Simulation: an Evaluation of Centralized-Time and Distributed-Time Algorithms 1992 Jun
Parallel Logic Simulation on General Purpose Machines
Parallel OPS5 on the Encore Multimax Authors: Gupta, Forgy, Kalp, Newell, Tambe 1988
"Parallelizing the Simulation of Ocean Eddy Currents" Authors:J. P. Singh J. L. Hennessy 1989 Aug
Partitioning and Scheduling Parallel Programs for Execution on Multiprocessors Author: Vivek Sarkar 1987 Apr
Partitioning parallel Programs for Macro-Dataflow
PASCAL and Pascal* Compiler Systems Author: Hennessy, J. 1979 Aug
Pascal*: A Pascal Based Systems programming language 1980 Jun
The Performance Advantages of Integrating Block Data Transfer in Cache-Coherent Multiprocessors 1994 Oct 5-7
The Performance Advantages of Integrating Message-Passing in Cache-Coherent Multiprocessors 1993 Nov
Performance Debugging Shared Memory Multiprocessor Programs with MTOOL 1991 Nov 18-22
Performance-Directed Memory Hierarchy Design Author: Steven A. Przybylski 1988 Sep
Performance Evaluation of Hybrid Hardware and Software Distributed Shared Memory Protocols 1993 Dec
Performance Evaluation of Memory Consistency Models for Shared-Memory Multiprocessors 1990 Dec
Performance Impact of Data Reuse in Parallel Dense Cholesky Factorization 1992 Jan
The Performance Impact of Flexibility in the Stanford FLASH Multiprocessor 1994 Oct 5-7
David Marple Performance Optimization of Digital VLSI Circuits 1986 Oct
Performance of Update Algorithms for Replicated Data in a Distributed Database 1979 Jun
The Priority-Based Coloring Approach
Procedure Merging with Instruction Caches 1991 Jun 26-28
Process Control and Scheduling Issues for Multiprogrammed Shared-Memory Multiprocessors 1989 Mar 14
Program Analysis and Optimization for Machines with Instruction Cache 1991 Sep
Programming for Different Memory Consistency Models 1992
McFarland
the Programming Language Rascal Author: Paulson, L. 1979 July
Performance Tradeoffs in Cache Design Authors: Przyblysky, Horowitz, Hennessy
Piecewise Linear Models for Rsim 1993 Nov 8-11
Piecewise Linear Models for Switch-Level Simulation 1992 Jun
Precise Delay Generation Using Coupled Oscillators J. Maneatis thesis 1994 Jun
A Portable Machine-Independent Global Optimizer-- Design and Measurements Author: Chow, F. 1983 Dec
Postpass Code Optimization of Pipeline Constraints 1983 July
Precise Delay Generation Using Coupled Oscillators J. M 1993 Dec
A Programming and Problem-Solving Seminar 1985 Jun
Qualifying Examinations in Computer Science 1965-1978 edited by Frank M. Liang 1979 Apr
Rationale, Design and Performance of the Hydra Multiprocessor K. Olukotun, et al. 1994 Nov
REDS: Resistance Extraction for Digital Simulation
Reducing the Cost of Branches McFarling, S. Hennessy, J. 1985
"Reducing Memory and Traffic Requirements for Scalable Directory-Based Cache Coherence Schemes" 1990 Mar
Reducing Overhead in Counter-Based Execution Profiling 1991 Oct
Research in VLSI Systems Systems Design and Architecture 1981 Mar
Research in VLSI Systems Technical Progress Report 1983-1984
Resumes of Graduate Students 1984 Feb
"Rounding Algorithms for IEEE Multipliers" Authors: M. Santoro, G. Bewick, M. Horowitz
The S-1 Multiprocessor Finnel 1978 Jun
Reverse Synthesis Compilation for Architectural Research 1984 Mar
RISC Architectures P. Chow, J. Hennessy
RISC-Based Processors: Concepts and Prospects Author: John Hennessy 1986 Mar 16-19
Research in VSLI Systems Technical Progress Report 1985 Apr - Oct
Retargetable Compiler Code Generation Author: M. Ganapathi, C. Fischer, J. Hennessy 1982
SAL: A Single Assignment Language for Parallel Algorithms 1983 Sep
Scalable Directories for Cache-Coherent Shared Memory Multiprocessors 1993 Jan
Scalable Directory Schemes for Cache Coherence 1988 Jun
Scalar Privatization: Algorithm and Effect on Compiler Detected 1991 Jan 16
Scaling Parallel Programs for Multiprocessors: Methodology and Examples 1992 Aug
A Self-Timed Chip for Division Authors: Williams, Horowitz, et al
Self-Timed Logic Using Current-Sensing Completion Detection (CSCD) 1991 Oct 14-16
A Self-Timed SRT Diversion Chip Authors: Williams, T., Horowitz, M., et al. 1986 Oct 1
Semantic Foundations of Jade 1992 Jan
"Semantic Predicates in Parser Generators" Author: M. Ganapathi 1989
Shared Memory vs. Message Passing Architectures: An Application Based Study Authors: Martonosi, Gupta
A Short Guide to MIPS Assembly Instructions Authors: Gross, T. Gill, J. 1983 Nov
Signal Delay in RC Tree Netowkrs Horowitz, M. 1983
A Simple and Efficient Implementation Approach for Single Assignment Language (Technical Summary) 1988 July
A Simple Interprocedural Register Allocation Algorithm and its Effectiveness for LISP
A Single Chip LSI High-Speed Functional Tester Authors: J. Miyamoto M.A. Horowitz 1987 Apr 1
SLIM: A Simulation Implementation Language for VLSI Microcode
Soft Configurable Water Scale integration: Design, Implementation, and Yield Analysis. Author: M. Blatt 1990 Jun
Specifying System Requirements for Memory Consistency Models 1993 Dec
Spectral Lower-Bound Techniques… Brandman 1987 Mar
A Spectral Lower-Bound Technique for the Size of Decision Trees and Two-Level Circuits
"SPIM: A Pipelined 64 x 64 bit Iterative Multiplier" Authors: M. Santoro, M.A. Horowitz 1989 Apr
SPLASH: Stanford Parallel Applications for Shared-Memory 1991 Apr
SPLASH: Stanford Parallel Applications for Shared-Memory 1992 Jun
SPUR: A VLSI Multiprocessor Workstation M. Hill et al 1985 Nov 8
SRT Division Diagrams and Their Usage… Williams/Horowitz 1986 Nov
Sail 1976 Aug
Monitor Command Manual 1976 Jan
Booklet of Viewgraphs Stanford Computer Forum 1981 Feb
Stanford U-Code
A Static Ram as a Fault Model Evaluator John Acken Mark Horowitz
Streams in a Single-Assignment Language
STRIP: A Self-Timed RISC Processor 1992 July
Study of Compiler Detection of Loop-Level Parallelism Technical Summary (A) 1992 Oct 8
The Stanford DASH Multiprocessor 1992 Mar
Suficient System Requirements for Supporting the PLPC Memory Model 1993 Dec
Suitability of Message Passing Computers for Implementing Production Systems
Summary of MIPS Instructions 1983 Nov
"Super-Scalar Processor Design" Author: William M. Johnson (thesis) 1989 Jun
Support for Speculative Execution in High-Performance Processors 1992 Nov
Computer Science Department 1987 Oct
Tau Epsilon Chi A System for technical Text 1978 Sep
Tau Epsilon Chi A System for technical Text 1978 Nov
Tau Beta Pi Teaching Survey 1976-1977
Series 2. Papers Accession ARCH-2017-269
Professional (CS) talks and slides for talks delivered by Hennessy and collaborators; subjects include MIPS, ACAST, LISP, MCP, RISC Architecture 1982/83-? [1980s]
MIPS Microprocessor transparencies; sent to Conservation for assessment [removed from box 8]
Professional (CS) talks and slides (chiefly transparencies) for talks delivered by Hennessy and collaborators; subjects include HPCC, Symbolic debugging, RISC architecture, DAC, CS Laboratory overviews, MTOOL, VLSI, Distributed computing, Control compilation, ARPA 1980s
ISCA (International Symposium on Computer Architecture) slide presentations, correspondence; ASCI (Accelerated Strategic Computing Initiative) Stanford proposal; slide presentations; various FLASH presentations; School of Engineering Tentative Fundraising Priorities FY99-04; DARPA ITO PI Meeting presentation slides 1996; ISAT 1991 presentation slides; DASH slides; IEEE Standards; High Performance Computing slides; Information Technology Office Programs and Strategy; School of Engineering Goals and Directions slides 1991-1999
Project documentation, correspondence, proposals, and reports on SWAMI, ASTEC, ARPA/DARPA, S-1 and U-Code compiler programs; Publisher correspondence for 1990 computer architecture textbook 1978-1989
3 BASF L750 Chrome Video Cassettes labeled 'MIPS-1,' 'MIPS-2,' and "4/22, 4/27"; VHS, "UCLA Computer Science Department Distinguished Lecturer Series, 1992-1993"; VHS, "Dr. William Clinger," 10/27/87, review copy"; VHS, John Hennessy, "Scalable Multiprocessors and the DASH Approach," 4.10.1992; VHS, Stanford University "Near West Campus"; VHS, "Future Directions in Computer Architecture," June 18, 1990; VHS tapes 1, 2, and 3, John Hennessy, "RISC Architectures: Fundamentals, Design Alternatives and Futures?", 7.5.1989; VHS, Hennessy, "Scalable Shared-Memory Multiprocessors and the DASH Approach," 6.19.1990; VHS, Hennessy "Wilkes, WK #0115," 10.3.95; VHS Hennessey, "Scalable Shared Memory Multiprocessors and the Stanford DASH Machine," 11.13.91; VHS, Justin Rattner, "Programming Techniques for Concurrent Supercomputers," September 2, 1988; VHS, Harold Stone, "Specializing in Parallel with a Combining Network," 10.9.1987; VHS, Seymour Cray, "What's All This About Gallium Arsenide," 11.15.1988; VHS, "George Taylor, MIPS. Profs. Allison/Wharton," 2.21.1990; VHS, EE 380 Allison and Wharton, 9.25.91; VHS, Tilak Agerwala, "Parallel Processing," April 28, 1989; VHS, "VC32 RISC," 10.26.1989; VHS, "John Hennessy Graphics", 3.27.1992; two tapes, Stanford Instructional Television Network, TV station format 1987-1995
Published and unpublished technical reports and papers by Hennessy and colleagues, primarily on MIPS-X project, with associated correspondence 1981-1986
Articles and reports kept by Hennessey, some written by him. Reports written by Hennessey may also include drafts and other supplementary materials . Research often related to MIPS 1980- 1994
"confidential" corporate reports (1987); MIPS Computer Systems documentation; SIGPLAN- Special Interest Group on Programming Languages; IEEE Standards Department Appeal Committee Report for Appeal #1754 (rejected) (1994); Draft Standard for a 32-bit Microprocessor Architecture (1993) 1984-1994
9 binders + 4 folders: mostly Computer Science and Telecommunications Board meeting agendas ; Committee on Academic Careers for Experimental Computer Sciences 1991-1994
Computer Science and Technology Board, materials from a number of years beginning in the late 1980s; course materials; an envelope of photos; two 3M data cartridges; Stanford Compiler Group SUIF Compiler System handbook 1989-1998
ASTEC II; NSF proposal (rejected): Advanced Computer Architecture and System Tech (ACAST); STC Proposal/Correspondence w/ David J. Kuck (UIUC) (1990); DARPA Reports 1988, 1989. 1987-1989
Transparencies. Handouts for 240B, RISC Architectures, overlay/slides, articles, 1987-1992
Conference, workshop, and association briefing materials (IEEE, ISCA, SIGARCH, VLSI, etc.); drafts and preprints of papers by Hennessy and others; technical reports by Hennessy and others 1978-1989
Miscellaneous stuff, electrical engineering docs, correspondence, World Economic Forum Industry Summit, SchoolEng publications, correspondence, 1986-1996
Articles and technical reports, by Hennessy and others 1960s-1990s
Industrial contracts; conference and workshop materials 1970s-1980s
Gates Computer Science Building and Geology Classroom Blueprints
FLASH Project: LSI, Intel FLASH Non-disclosure agreements; articles; Army Award-Sponsored Projects; Qtrly Reports; Darpa 2/20/97; 1996-1997
Videotapes (VHS & 2 Beta): The Distinguished Lecture Series; Commercial Lectures; Corporate tapes; \non-labeled tapes; prof's course tapes 1980s-1990s
Articles and technical reports, by Hennessy and others (Dataflow research projects; UCI Dataflow Architecture Project; Advanced Research Projects Agency; ACM Transactions on Programming Language and Systems; National Science Foundation; IBM; Computer Science Department; Science Research Council; Palo Alto Research Center;Institute for Electrical Engineers; various universities) 1977-1991
Presentation and meeting materials (Advisory Board Council Meetings; HPCC Committee; Advanced Reserach Projects Agency; Defense Advanced Research Project Agency Inforamtion Science and Technology Office; Workshop Series on High Performance Computing and Communications; National Center for Biotechnology Information; Computer Science and Telecommunications Board; ISAT Executive Committee) 1982-1998
Videotapes (29 VHS): Distinguished Lecture Series, Volume II; The Distinguished Lecture Series IV; The Distinguished Lecture Series VI; Selections from Hot Chips V; LEaders in Computer Science & Electrical Engineering 1989-1993
Notes and course materials; transparencies; historical talk slides; EE281 Microcomputer Lab [First class he taught]; MIPS related slides 1977-1989
Videotapes (29 VHS): Distinguished Lecture Series, Volume II; The Distinguished Lecture Series IV; The Distinguished Lecture Series VI; Selections from Hot Chips V; Leaders in Computer Science & Electrical Engineering 1977-1986